Master dataINID | Criterion | Field | Content |
---|
| Type of IP right | SART | Patent |
| Status | ST | Pending/in force |
21 | DE file number | DAKZ | 10 2019 118 926.8 |
54 | Designation/title | TI | SPEICHERREDUNDANZ |
51 | IPC main class | ICM (ICMV) | G11C 29/24 (2006.01) |
22 | DE application date | DAT | Jul 12, 2019 |
43 | Date of first publication | OT | Jan 16, 2020 |
71/73 | Applicant/owner | INH | Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW |
72 | Inventor | IN | Huang, Chien-Yu, Hsinchu, TW; Huang, Chia-En, Hsinchu, TW; Lee, Cheng Hung, Hsinchu, TW; Shieh, Hau-Tai, Hsinchu, TW |
74 | Representative | VTR | BOEHMERT & BOEHMERT Anwaltspartnerschaft mbB - Patentanwälte Rechtsanwälte, 28359 Bremen, DE |
10 | Published DE documents | DEPN | Original document:
DE102019118926A1 Searchable text:
DE102019118926A1 |
| Address for service | | BOEHMERT & BOEHMERT Anwaltspartnerschaft mbB - Patentanwälte Rechtsanwälte, 28359 Bremen, DE |
33 31 32
| Foreign priority | PRC PRNA PRDA
| US 62/698,640 Jul 16, 2018
|
33 31 32
| Foreign priority | PRC PRNA PRDA
| US 16/509,178 Jul 11, 2019
|
| Due date | FT FG | Jul 31, 2026 Annual fee for the 8th year
Patent fees |
| Patent division in charge | | 55 |
56 | Citations | CT |
US000005566128A (US 5 566 128 A)
|
56 | NPL citations | CTNP | K Ithoh VLSI Memory Chip Design, Dr. Kiyoo Itoh, Springer Berlin Heidelberg, 2001, Kapitel 3.9 Redundancy, S.178-194 |
43 | Date of first publication | EVT | Jan 16, 2020 |
| Number of official communications (office actions) | | 1 |
| Number of responses | | 1 |
| Date of the first transfer into DPMAregister | EREGT | Jan 16, 2020 |
| Date of the (most recent) update in DPMAregister | REGT | Aug 12, 2025 (Show all update days)(Hide all update days)- Aug 12, 2025
- Jun 3, 2025
- St.36: changed (technical change)
- Aug 9, 2024
- Aug 7, 2024
- St.36: changed (technical change)
- Jan 16, 2020
- Date of the first transfer into DPMAregister
|